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有没有人知道如下条款中说提到的电压梯度的峰值如何检测?有没有实例说明怎么将这个条款应用到线路板上呢?谢谢!& i, h5 e2 T, A3 ~6 _# J, C
4 U+ |; [) [$ g2 H28.1
, X& J" S2 h, P ~8 iFor conductive patterns on printed circuit boards, except at their edges, the values in the
: M% J0 m, Z: W3 I4 C: p; U# Jtable between parts of different potential may be reduced, as long as the peak value of the
' V/ o! G% |' U, a0 m; u5 L- Mvoltage stress does not exceed:
i9 |* M& J( ^! a% A– 150 V per mm with a minimum distance of 0,2 mm, if protected against the deposition of dirt;
& T, {' ]6 Y2 D/ t# y– 100 V per mm with a minimum distance of 0,5 mm, if not protected against the deposition of6 ?% s4 o% ~8 s' Z
dirt.
! C! \- ~' M. M% U/ O" lWhen the limits mentioned above lead to higher values than those of the table, the values of" `* Y4 b, F9 T
the table apply.
6 b! M8 Q+ y6 S4 _5 aFor peak voltages exceeding 50 V, the reduced creepage distances only apply if the Proof7 I' N$ S9 ~+ z" `4 n8 P' P
Tracking Index (PTI) of the printed circuit board, measured as in Annex G, is greater than
D6 C6 W' i0 [9 z+ u7 l; `' W175.8 X( Y5 t& d/ d! J& X7 c- f5 d
These distances may be reduced further, provided that the tool complies with the
, O4 X; @" b4 o+ R1 [* G9 E0 trequirements of Clause 18 when the distances are short-circuited in turn.+ X1 I7 q% H# k3 u" Q/ a
' v8 n" B! H) j. M: h- @7 _, p对印刷电路板上的导电图形,其边棱除外,只要电压梯度的峰值没有超过下述值,表中关于不同极性部件间的值可以减小.
. R- w- O: f- E9 q ——若是防尘物沉积的,为150V/mm,但最小距离为0.2mm.9 v) u1 R } Z2 X. V# T
——若不是防尘物沉积的,为100V/mm,但最小距离为0.5mm.
; t5 S' |/ w6 c: r$ a2 h8 I 对峰值电压超过150V的情况,只有印刷电路板的耐漏电起痕指数(PTI)按照附录G进行测量时超过175,减小的爬电距离规定才适用.
! ?" m# x1 Z% |5 R3 ~4 S& R; v 只要当这些距离轮流短路时,器具符合19章的要求,这些距离可以进一步的减小. |
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