|
jsspace 发表于 2016-10-11 11:34
- j7 h! {) G8 e! z: E漏液不可以接受,不管是否灌胶。 & E4 ?: y/ O5 H m
4 f. {+ {! n: n# B$ j, Z8.7.1.2 After ultimate results have been obtained for each test, the sample shall be permitted to cool to8 }: o3 B- C( n. h" M
room temperature and the dielectric voltage withstand test of 8.6 shall be repeated.% K! D- P. \0 b7 J7 q
8.7.1.3 A risk of fire or electric shock is considered to exist with any of the following results:
+ I; x, |( V- a7 d) f* t& ca) Opening of the ground fuse,
1 P( Q# M z* f$ K( B3 E, |b) Charring of the cheesecloth or tissue paper,0 a( |+ N" f) g/ O
c) Emission of flame or molten material from the unit,
7 e0 w8 V- k5 o% {: J& _. { jd) Ignition or dripping of a compound from the unit,9 n, _% _$ ^0 L6 c3 ]# y
e) Exposure of live parts that pose a risk of electric shock under the requirements for( N) Q: S9 F5 w6 b( ^
accessibility of 7.2, or
{7 ~3 n3 o, e/ p- a0 Zf) Breakdown during the subsequent dielectric voltage withstand test.
. g) A# i9 [7 p' k4 S# k7 b8 |Opening of the 20A time delay fuse is acceptable provided none of the other conditions noted in (a)
+ b7 a! y. i6 C' J) ythrough (f) occurs.
x3 t; R$ W7 J4 |6 J' R8 v+ y; J
/ [: e( P8 G h$ f* ? r$ f3 S+ x
; r8 {8 b. ~ M# Z1 A. p E8.7.2 Component failure test
$ g$ w, Y2 r `- o8.7.2.1 A unit having components such as resistors, semiconductor devices, capacitors, and the like shall6 s5 l$ ], R% q7 G8 B6 }1 ~1 r
not exhibit a risk of fire or electric shock when a simulated short circuit or open circuit is imposed. In
2 T4 m" D7 k( y ?" c" z- apreparation for component failure tests, the equipment, circuit diagrams, and component specifications
: T% j! z. z" R4 {are examined to determine those fault conditions that might reasonably be expected to occur. Examples2 q$ l& ]( e: G. T
include: short-circuits and open circuits of semiconductor devices and capacitors, faults causing open( K% B, r! o7 {9 @7 X
circuits of resistors and internal faults in integrated circuits.& e) P7 e- _! T q, ` F) x
Exception No. 1: Circuits in which maximum power levels have been determined to not exceed 50 W need
! Q! e* W3 M, e0 c- L# v" |( pnot be evaluated for component failure.
& V3 Q2 R9 F9 g k5 w( L7 hException No. 2: Devices supplied by a source operating within the limits for risk of fire and electric shock
, i6 p0 f& Y+ s, a, pneed not be subject to this test., p q) F0 M" u7 I( Z
8.7.2.2 Each component is to be short circuited or open circuited, one at a time (one fault per test). Each* A+ P$ J$ f( j( U2 Z
test shall continue until either the unit is no longer operable, or until conditions are obviously stable (as
' k: i+ y1 ~3 {determined by no visual.
% w; r+ |% B4 C. Y# W: N/ G4 i: e) G
# q5 F, V8 G7 t) P
再核对一下标准看有没有答案?9 M' u' \, G+ S4 o7 }+ l7 Y( ?
|
|