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| PDSH 1009
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8 |, S3 p4 F& J5 ]$ _8 ? | Short circuit across creepage distances and clearances
& o3 [8 P6 i5 o, { | 14.1/ Z3 [7 [$ X* n- O4 N0 c4 t
| 61347-1(ed.1);am1 & 61347-1(ed.2);am17 [4 k1 a! ~' S+ ~+ q9 e7 J8 l3 @6 ^
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Standard(s):
' r3 B, K( a7 O$ p! K* K; A ~* TIEC 61347-1 All editions
' z4 N# N6 G# H) \6 m+ Q( R5 b) tSubclause(s): 14.11 E+ |1 p4 D, O
No. Year PDSH 1009 2010
1 Z9 q+ m' a1 g' d' L; C4 nCategory: LITE Developed by: ETF5 OSM/LUM/ Y V7 _7 D) O) m B7 r5 i
Subject:1 ]: X6 a x, L( Y0 `- K
Short circuit across creepage distances and clearances
$ |; }1 w% D( @) aKey words:
5 v( u9 W' E- {+ |2 u- COMEX" ?6 R6 ~8 a+ V }0 Y! U
- PCB3 p- X6 c2 |8 p2 h' w- x
- Creepage distance and clearance
7 g1 u! C/ D ]$ P: ^9 D1 o7 uTo be approved at the 49th CTL Plenary Meeting, in 2012
( j, k" V+ R6 z1 dQuestion:
7 Y1 U6 u& k( Y! X0 h: oThe standard specifies that between conductors on PCB’s, which are protected from surge energy from the
1 g. s: y6 ?! ~* nsupply (for example choke winding or capacitor) the creepage distances and clearances may be reduced.8 @4 s. U/ y3 G9 |! @
Would such a reduction be acceptable after track-fuses, even before components, which reduce the supply
; w9 {3 e# Z& L/ lsurge energy?3 m* O- w7 A$ d( X U* Q
Decision:3 l3 |+ }. I+ K( W0 K& X8 \/ h
No.7 Z- x5 g% H+ M# L* C) l
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